The present invention relates to a method for fabricating a semiconductor device, and more particularly, it relates to a method for forming a low dielectric film locally in a region of an insulating film where capacitance between interconnects is desired to be lowered.
Recently, in accordance with the increased degree of integration and the increased performance and operation speed of semiconductor integrated circuit devices, metal interconnects have been further refined and formed in structures of a larger number of levels. As one of means for attaining the refinement and the multi-level structures, a technique to use, as, an interlayer insulating film, an insulating film with a low dielectric constant (hereinafter referred to as a low dielectric insulating film) has been proposed.
When a low dielectric insulating film is used for forming an interlayer insulating film, capacitance between interconnects can be lowered so as to avoid a problem of signal delay.
However, most of currently examined low dielectric insulating films have disadvantages of weakness against impact due to low mechanical strength and a poor heat conducting property due to low thermal conductivity.
In a technique proposed for overcoming these disadvantages, a low dielectric insulating film is used in a region of an interlayer insulating film where signal delay can lead to a serious problem, and an insulating film having a high dielectric constant but having high mechanical strength and high thermal conductivity, such as a silicon oxide film, is used in a region of the interlayer insulating film where signal delay does not lead to a serious problem.
Now, a method for locally forming a low dielectric insulating film between interconnects disclosed in Japanese Laid-Open Patent Publication No. 11-135620 will be described with reference to FIGS. 9A through 9D.
First, as shown in FIG. 9A, after forming metal interconnects 11 on a semiconductor substrate 10, a resist pattern 12 is formed on a region of the semiconductor substrate 10 where capacitance between interconnects is particularly desired to be lowered.
Next, as shown in FIG. 9B, a silicon oxide film 13 is formed by liquid phase growth on a region of the semiconductor substrate 10 where the resist pattern 12 is not formed.
Then, as shown in FIG. 9C, after removing the resist pattern 12, a low dielectric insulating film 14 is formed on the entire face of the semiconductor substrate 10.
Subsequently, as shown in FIG. 9D, a portion of the low dielectric insulating film 14 present on the silicon oxide film 13 is removed by CMP, thereby placing the top faces of the silicon oxide film 13 and the low dielectric insulating film 14 at substantially the same level.
By repeatedly carrying out the aforementioned procedures, the low dielectric insulating film 14 can be selectively formed in regions where capacitance between interconnects is particularly desired to be lowered.
When the interconnect pitch is reduced as a result of reduction of semiconductor integrated circuit devices, however, it becomes difficult to fill the low dielectric insulating film between interconnects, which disadvantageously restricts the material for the low dielectric insulating film.
Also, since the low dielectric insulating film is generally poor in the mechanical strength, there arises a problem that defects such as peeling and scratch may be caused in the low dielectric insulating film in planarizing it by the CMP.
In consideration of the aforementioned conventional problems, an object of the invention is definitely forming a low dielectric insulating film between interconnects with a small interconnect pitch and preventing peeling or scratch of the low dielectric insulating film.
In order to achieve the object, the first method for fabricating a semiconductor device of this invention comprises the steps of forming, on a substrate, a first insulating film with a relatively low dielectric constant and low mechanical strength; patterning the first insulating film by selectively etching the first insulating film by using a mask pattern formed on a first region of the first insulating film; forming, on a substrate, a second insulating film with a relatively high dielectric constant and high mechanical strength; exposing a face of the patterned first insulating film by planarizing the second insulating film by polishing; forming a first interconnect groove on the patterned first insulating film; and forming a buried interconnect in the first interconnect groove.
In the first method for fabricating a semiconductor device, after forming the patterned first insulating film in the first region by patterning the first insulating film with a low dielectric constant and low mechanical strength, the second insulating film with a high dielectric constant and high mechanical strength is formed. Therefore, merely the first insulating film with a low dielectric constant can be present in the first region. Also, the face of the patterned first insulating film is exposed by planarizing the second insulating film with high mechanical strength by polishing, so as to place the top face of the second insulating film at substantially the same level as the top face of the patterned first insulating film. Therefore, defects such as peeling and scratch can be prevented from being caused in the first insulating film with low mechanical strength. Furthermore, since the buried interconnect is formed by filling the metal film in the first interconnect groove formed in the patterned first insulating film with a low dielectric constant, the first insulating film can be definitely disposed between interconnects even when the interconnect pitch is small.
The first method for fabricating a semiconductor device preferably further comprises a step of forming, on the buried interconnect, a third insulating film for preventing diffusion of a metal included in the buried interconnect.
Thus, the metal included in the buried interconnect can be prevented from diffusing into the insulating film formed thereon.
In the first method for fabricating a semiconductor device, both of the first insulating film and the second insulating film preferably include inorganic materials as principal constituents, and the step of forming the first interconnect groove preferably includes a sub-step of forming a second interconnect groove in a second region of the second insulating film.
Thus, the first interconnect groove and the second interconnect groove can be respectively formed in the first insulating film and the second insulating film through one selective etching.
Alternatively, in the first method for fabricating a semiconductor device, it is preferred that the first insulating film includes an organic material as a principal constituent and that the second insulating film includes an inorganic material as a principal constituent, and the method preferably further comprises, before or after the step of forming the interconnect groove, a step of forming a second interconnect groove in a second region of the second insulating film.
Thus, a material with a low dielectric constant can be used for the first insulating film. Also, even when the first insulating film and the second insulating film are made from different materials, the first interconnect groove and the second interconnect groove can be respectively formed in the first insulating film and the second insulating film.
In this case, the sub-step of forming the second interconnect groove is preferably carried out before the step of forming the first interconnect groove in the patterned first insulating film.
The second method for fabricating a semiconductor device of this invention comprises the steps of forming, over a substrate, a first insulating film with a relatively low dielectric constant and low mechanical strength; forming, on the first insulating film, a second insulating film with higher mechanical strength than the first insulating film; patterning the second insulating; film and the first insulating film by selectively etching the second insulating film and the first insulating film by using a first mask pattern formed on a first region of the second insulating film; forming, on the substrate, a third insulating film with a relatively high dielectric constant and high mechanical strength; exposing a face of the patterned second insulating film by planarizing the third insulating film by polishing; forming a first interconnect groove in the patterned second insulating film and the patterned first insulating film; and forming a buried interconnect in the first interconnect groove.
In the second method for fabricating a semiconductor device, after forming the patterned first insulating film in the first region by patterning the first insulating film with a low dielectric constant and low mechanical strength, the third insulating film with a high dielectric constant and high mechanical strength is formed. Therefore, the first insulating film with a low dielectric constant can be present in the first region alone. Also, after forming the second insulating film with high mechanical strength on the first insulating film with low mechanical strength, the face of the patterned second insulating film is exposed by planarizing the third insulating film by polishing so as to place the top face of the third insulating film act substantially the same level as the top face of the patterned second insulating film. Therefore, the defects such as peeling and scratch can be prevented from being caused in the first insulating film with low mechanical strength. Furthermore, since the buried interconnect is formed by filling the metal film in the first interconnect groove formed in the patterned first insulating film with a low dielectric constant, the first insulating film can be definitely disposed between interconnects even when the interconnect pitch is small.
In particular, in the second method for fabricating a semiconductor device, after forming the second insulating film with high mechanical strength on the first insulating film with low mechanical strength, the face of the patterned second insulating film is exposed by planarizing the third insulating film by polishing so as to place the top face of the third insulating film at substantially the same level as the top face of the patterned second insulating film. Accordingly, the insulating film present in the first region can be prevented from reducing in its thickness.
In the second method for fabricating a semiconductor device, the first insulating film preferably includes an organic material as a principal constituent, and the step of forming the first interconnect groove preferably includes a sub-step of forming an upper portion of the first interconnect groove in the second insulating film through etching using a second mask pattern formed on the patterned second insulating film, and removing the second mask pattern in forming a lower portion of the first interconnect groove in the first insulating film.
Thus, the removal of the mask pattern and the formation of the first interconnect groove in the patterned first insulating film can be simultaneously carried out, resulting in reducing the number of procedures.
In the second method for fabricating a semiconductor device, the second insulating film preferably has mechanical strength of 4.0 through 20.0 GPa.
Thus, scratch can be prevented from being caused in the patterned second insulating film during the planarization of the third insulating film by polishing.
In the second method for fabricating a semiconductor device, the second insulating film preferably has a dielectric constant of 3.5 through 4.5.
Thus, capacitance between interconnects can be prevented from increasing even though the second insulating film is formed on the first insulating film with a low dielectric constant.